Maxeler Technologies is presenting a joint paper with Schlumberger at the Annual HOT CHIPS conference Aug 22-24 at Stanford University, titled: “Surviving the End of Scaling of Traditional Microprocessors in HPC”.
Since it started in 1989, HOT CHIPS has been known as one of the semiconductor industry’s leading conferences on high-performance microprocessors and related integrated circuits. The conference is held once a year in August and typically attracts more than 500 attendees from all over the world.
The Maxeler/Schlumberger HOT CHIPS presentation focuses on the impact of microprocessors hitting the physical limits of making transistors smaller and faster, resulting in a power wall, a memory wall, and a clock frequency wall. In particular, case studies from Geophysical processing show the growth in compute capability needed by the Seismic industry and acceleration is stepping up to the challenge.
A key conclusion is that “the algorithmic approach needs to fit the underlying architecture and, ideally, the architecture needs to be adjusted to fit the algorithm. This requires a tool stack [such as provided by Maxeler] that is usable to the algorithm writer and interaction between hardware vendors and application providers.”