On 21 April 2016, Oskar Mencer, Maxeler’s CEO will present a keynote talk titled “The Multiscale Dataflow Computing Chip” at the IEEE Symposium on Low-Power and High-Speed Chips, Cool Chips XIX. His talk will focus on Maxeler’s effort to design a dedicated DataFlow computing Chip (DFC) capable of maximizing performance per cubic foot of datacenter space as well as maximizing performance per Watt. Currently, Maxeler’s dataflow computers are running on top of the largest FPGA chips connected to large amounts of DRAM, yielding a 20-50x speed advantage over conventional high end microprocessors. A further 10-20x improvement in performance can be achieved with a dedicated DataFlow computing Chip. Over the years, Maxeler has shown a wide range of applications running very efficiently on dataflow computers, among others Seismic Imaging, Monte Carlo simulations, Video Encoding, Quantum Chromodynamics, (Financial) Transaction Processing, SNORT, Network Processing, Climate Modelling, Computational Fluid Dynamics, and Machine Learning. The existing vast infrastructure and collection of applications will form the basis for deployment of dataflow computers in the Cloud as well as a justification to build and successfully deploy a completely new kind of computing device.

More information here.