MAX-UP Publications

MAX-UP members frequently publish research work with Maxeler technology. On this page we highlight a few of these publications. If you would like your MAX-UP publication considered for inclusion here, please contact Cliff Winckless.

2016

Spiking neural network simulation on FPGAs with automatic and intensive pipelining

Taro Kawao, Masato Neishi, Tomohiro Okamoto, Amir Masoud Gharehbaghi, Takashi Kohno, Masahiro Fujita

University of Tokyo, Japan

International Symposium on Nonlinear Theory and Its Applications (NOLTA), 2016

Optimising Sparse Matrix Vector Multiplication for Large Scale FEM problems on FPGA

Paul Grigoras, Pavel Burovskiy, Wayne Luk, Spencer Sherwin§

Department of Computing, Imperial College London, §Department of Aeronautics, Imperial College London

2016 International Conference on Field Programmable Logic and Applications (FPL)

F-CNN: An FPGA-based Framework for Training Convolutional Neural Networks

Wenlai Zhao§, Haohuan Fu§, Wayne Luk, Teng Yu, Shaojun Wang*, Bo Feng§, Yuchun Ma§ and Guangwen Yang§

Imperial College London, UK, §Tsinghua University, China, *Harbin Institute of Technology, China

International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016

Relation-Oriented Resource Allocation for Multi-Accelerator Systems

Teng Yu, Bo Feng§, Mark Stillwell*, Jose Gabriel F Coutinho, Wenlai Zhao§, Shuang Liang§, Wayne Luk, Alexander L. Wolf, Yuchun Ma§

Imperial College London, UK, §Tsinghua University, China, *Cisco Meraki, UK

International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016

A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification

Shaojun Wang§, Xinyu Niu§, Ning Ma, Wayne Luk§, Philip Leong*, and Yu Peng

Harbin Institute of Technology, China, §Imperial College London, UK, *University of Sydney, Australia

Applied Reconfigurable Computing (ARC), Springer, LNCS, Volume 9625, pp 105-116, 2016

Leveraging FPGAs for Accelerating Short Read Alignment

James Arram, Thomas Kaplan, Wayne Luk and Peiyong Jiang§

Department of Computing, Imperial College London, §Department of Chemical Pathology, The Chinese University of Hong Kong

IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol.PP, no.99, pp.1-1, 2016

Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs

Maciej Kurek, Marc Peter Deisenroth, Wayne Luk and Timothy Todman

Imperial College London

2016 International Symposium on Field-Programmable Custom Computing Machines (FCCM)

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center

Achim Lösch, Tobias Beisel, Tobias Kenter, Christian Plessl, and Marco Platzner

University of Paderborn

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016

Performance Analysis of Accelerated Biophysically-Meaningful Neuron Simulations

Georgios Smaragdos, Georgios Chatzikostantis§, Sofia Nomikou§, Dimitrios Rodopoulos§, Ioannis Sourdis*, Dimitrios Soudris§, Chris I. De Zeeuw and Christos Strydis

Erasmus Medical Center, Netherlands, §National Technical University of Athens, Greece, *Chalmers University of Technology, Sweden

International Symposium on Performance Analysis of Systems and Software ISPASS 2016, April 2016 – Nominated for Best Paper Award

CASK – Open-Source Custom Architectures for Sparse Kernels

Paul Grigoras, Pavel Burovskiy and Wayne Luk

Department of Computing, Imperial College London, UK

International Symposium on Field-Programmable Gate Arrays (FPGA), pp 179-184, 2016

NeuroFlow: A General Purpose Spiking Neural Network Simulation Platform using Customizable Processors

Kit Cheung†§, Simon R. Schultz§ and Wayne Luk

Custom Computing Research Group, Department of Computing, Imperial College London, §Centre for Neurotechnology, Department of Bioengineering, Imperial College London

Frontiers in Neuroscience, vol 9, no 00516, 2016

2015

Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study

Tobias Kenter, Henning Schmitz, and Christian Plessl

University of Paderborn

International Journal of Reconfigurable Computing, Volume 2015 (2015), Article ID 859425

On the use of programmable hardware and reduced numerical precision in earth-system modeling

Peter D. Düben, Francis P. Russell§, Xinyu Niu§, Wayne Luk§ and T. N. Palmer

Department of Physics, University of Oxford, §Department of Computing, Imperial College London

Journal of Advances in Modeling Earth Systems, vol. 7, issue 3, pp. 1393-1408, 2015.

Using Type Transformations to Generate Program Variants for FPGA Design Space Exploration

Syed Waqar Nabi and Wim Vanderbauwhede

University of Glasgow

ReConFigurable Computing and FPGAs (ReConFig), 2015

FPGA Port of a Large Scientific Model from Legacy Code: The Emanuel Convection Scheme

Kristian Thorin Hentschel, Wim Vanderbauwhede, Syed Waqar Nabi

University of Glasgow

Advances in Parallel Computing, Volume 27, Pages 469 – 478

FPGA Acceleration of Reference-Based Compression for Genomic Data

James Arram, Moritz Pflanzer, Thomas Kaplan, Wayne Luk

Department of Computing, Imperial College London

Field Programmable Technology (FPT), pp. 9-16., 2015

Efficient Assembly for High Order Unstructured FEM Meshes

Pavel Burovskiy, Paul Grigoras, Spencer Sherwin§, Wayne Luk

Department of Computing, Imperial College London, §Department of Aeronautics, Imperial College London

2015 International Conference on Field Programmable Logic and Applications (FPL)

Feasibility Study of Porting a Particle Transport Code to FPGA

Iakovos Panourgias, Michele Weiland, Mark Parsons, David Turland§, Dave Barrett§, Wayne Gaudin§

EPCC, University of Edinburgh, §AWE

High Performance Computing, Lecture Notes in Computer Science, Springer, vol 9137, pp 139-154, 2015

Paradigm Shift in Big Data SuperComputing: DataFlow vs. ControlFlow

Nemanja Trifunovic, Veljko Milutinovic, Jakob Salom§ and Anton Kos*

University of Belgrade, §Mathematical Institute of the Serbian Academy of Sciences and Arts, *University of Ljubljana

Journal of Big Data, May 2015

In-circuit temporal monitors for runtime verification of reconfigurable designs

Tim Todman, Stephan Stilkerich§ and Wayne Luk

Department of Computing, Imperial College London, UK, §Airbus Group Innovations, Ottobrun

Design Automation Conference (DAC), 50:1-50:6, 2015

Reconfigurable acceleration of fitness evaluation in trading strategies

Andreea Ingrid Funie, Paul Grigoras, Pavel Burovskiy, Wayne Luk, Mark Salmon

Department of Computing, Imperial College London,

Application-specific Systems, Architectures and Processors (ASAP), p. 210-217, 2015

Architectures and precision analysis for modelling atmospheric variables with chaotic behaviour

Francis P. Russell, Peter D. Düben§, Xinyu Niu, Wayne Luk, T. N. Palmer§

Imperial College London, §University of Oxford

2015 International Symposium on Field-Programmable Custom Computing Machines (FCCM)

Ramethy: Reconfigurable Acceleration of Bisulfite Sequence Alignment

James Arram, Wayne Luk, Peiyong Jiang§

Imperial College London, §Chinese University of Hong Kong

2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)

Automating Elimination of Idle Functions by Runtime Reconfiguration

Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu§, Oliver Pell

Imperial College London, §Tianjin University, Maxeler Technologies

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 8 Issue 3, May 2015

Mapping adaptive particle filters to heterogeneous reconfigurable systems

T. C. P. Chow, X. Niu, A. Eele§, J. Maciejowski§, P.Y.K. Cheung and W. Luk

Imperial College London, §University of Cambridge

ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 4, Article 36, Jan 2015

2014

Pipelined HAC estimation engines for multivariate time series

C. Guo and W. Luk

Imperial College London

Journal of Signal Processing Systems, Volume 77, Issue 1-2, pp. 117-129, Oct 2014

Kernel-centric acceleration of high accuracy stereo-matching

Tobias Kenter, Henning Schmitz, Christian Plessl

University of Paderborn

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig)

Collaborative processing of Least-Square Monte Carlo for American options

Jinzhe Yang, Ce Guo§, Wayne Luk§, Terence Nahar

Aberdeen Asset Management, §Imperial College London

2014 International Conference on Field-Programmable Technology (FPT)

Particle filtering-based Maximum Likelihood Estimation for financial parameter estimation

Jinzhe Yang§, Binghuan Lin*, Wayne Luk, Terence Nahar§

Imperial College London, §SWIP, *Techila Technologies

International Conference on Field Programmable Logic and Applications (FPL)

Patra: Parallel tree-reweighted message passing architecture

Wenlai Zhao, Haohuan Fu, Guangwen Yang, Wayne Luk§

Tsinghua University, §Imperial College London

International Conference on Field Programmable Logic and Applications (FPL)

Combining flexibility with low power: Dataflow and wide-pipeline LDPC decoding engines in the Gbit/s era

João Andrade, Frederico Pratas§, Gabriel Falcão, Vítor Manuel Mendes da Silva, Leonel Sousa§

University of Coimbra, Portugal, §Universidade de Lisboa, Portugal

Application-specific Systems, Architectures and Processors (ASAP)

A Hybrid Genetic-Programming Swarm-Optimisation Approach for Examining the Nature and Stability of High Frequency Trading Strategies

Andreea-Ingrid Funie, Mark Salmon§, Wayne Luk

Imperial College London, §University of Cambridge

13th International Conference on Machine Learning and Applications, ICMLA 2014

Automating Optimization of Reconfigurable Designs

M. Kurek, T. Becker, T. C. P. Chau and W. Luk

Imperial College London

2014 International Symposium on Field-Programmable Custom Computing Machines (FCCM)

SMCGen: Generating Reconfigurable Design for Sequential Monte Carlo Applications

T. C. P. Chau, M. Kurek, J. S. Targett, J. Humphrey, G. Skouroupathis, A. Eele§, J. Maciejowski§, B. Cope*, K. Cobden*, P. Leong, P. Y. K. Cheung, W. Luk

Imperial College London, §University of Cambridge, *Altera, University of Sydney

2014 International Symposium on Field-Programmable Custom Computing Machines (FCCM)

Accelerating parameter estimation for multivariate self-exciting point processes

Ce Guo, Wayne Luk

Imperial College London

Field-Programmable Gate Arrays (FPGA) 2014: 181-184

Elastic Management of Reconfigurable Accelerators

Paul Grigoras, Max Tottenham, Xinyu Niu, José Gabriel F. Coutinho, Wayne Luk

Imperial College London

International Symposium on Parallel and Distributed Processing with Applications

2013

Dynamic Stencil: Effective Exploitation of Run-time Resources in Reconfigurable Clusters

Xinyu Niu, Jose G. F. Coutinho, Wang Yu§ and Wayne Luk

Imperial College London, §Tsinghua University

2013 International Conference on Field-Programmable Technology (FPT), pp. 214-221

Hardware Acceleration of Genetic Sequence Alignment

J. Arram, K.H.Tsoi, W. Luk and P. Jiang§

Imperial College London, §Chinese University of Hong Kong

Reconfigurable Compitung: Architectures, Tools and Applications (ARC) 2013, pp 13-24

A Flexible Hashtable Design For 10Gbps Key-value Stores

Z. Istvan, G. Alonso, M. Blott§, K. Vissers§

ETH Zürich, §Xilinx Inc.

23rd International Conference on Field Programmable Logic and Applications (FPL’13)

A2B: An integrated framework for designing heterogeneous and reconfigurable systems

C. Pilato, R. Cattaneo, G. Durelli, A.A. Nacci, M.D. Santambrogio, D. Sciuto

Politecnico di Milano

NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2013

FASTER Run-Time Reconfiguration Management

C. Ciobanu§, D. Pnevmatikatos, K. Papadimitriou, G. Gaydadjiev§

§Chalmers University of Technology, Foundation for Research and Technology – Hellas

ICS ’13 Proceedings of the 27th international ACM conference on International conference on supercomputing

An FPGA-Based Data Flow Engine for Gaussian Copula Model

H. Ruan, X. Huang, H. Fu, G. Yang, W. Luk

Tsinghua University

Proceedings of the 21th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 218-225, Seattle, 2013.

A Flexible Interconnection Structure for Reconfigurable FPGA Dataflow Applications

G. Durelli, A.A. Nacci, R. Cattaneo, C. Pilato, D. Sciuto, M.D. Santambrogio

Politecnico di Milano

Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International

Accelerating Finite Difference Time Domain Simulation with Reconfigurable Dataflow Computers

H. Giefers§, C. Plessl, J. Förstner

§IBM Research, University of Paderborn

Fourth International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies

Dataflow Computing with Polymorphic Registers

C. Ciobanu§, G. Gaydadjiev§, C. Pilato, D. Sciuto

§Chalmers University of Technology, Politecnico di Milano

International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013

FPGA-accelerated Key Search for Cold-Boot Attacks against AES

H. Riebler, T. Kenter, C. Sorge, C. Plessl

University of Paderborn

International Conference on Field-Programmable Technology (ICFPT), 2013

A Heterogeneous Computing Framework for Computational Finance

Gordon Inggs, David B. Thomas, Wayne Luk

Imperial College London

42nd International Conference on Parallel Processing, ICPP 2013

Implementation of the RSA Algorithm on a Dataflow Architecture

N. Bezanic, J. Popovic-Bozovic, V. Milutinovic, I. Popovic

University of Belgrade

The IPSI BgD Transactions on Internet Research, IPSI Bgd Internet Research Society, Volume 9 Number 2 July 2013

Solving Gross Pitaevskii Equation Using Dataflow Paradigm

S. Stojanovic, D. Bojic, V. Milutinovic

University of Belgrade

The IPSI BgD Transactions on Internet Research, IPSI Bgd Internet Research Society, Volume 9 Number 2 July 2013

2012

A Fully-Pipelined Expectation-Maximization Engine for Gaussian Mixture Models

Ce Guo, Haohuan Fu§, Wayne Luk

Imperial College London, §Tsinghua University

2012 International Conference on Field-Programmable Technology (FPT)

Evaluating Reconfigurable Dataflow Computing Using the Himeno Benchmark

Y. Sato, Y. Inoguchi, W. Luk and T. Nakamura

JAIST, JST CREST, Imperial College London and Keio University

In Proc. 2012 International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012

A mixed precision Monte Carlo methodology for reconfigurable accelerator systems

G.C.T. Chow, A.H.T. Tse, Q. Jin, W. Luk, P.H.W. Leong and D.B. Thomas.

Imperial College London

In Proc. ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), ACM, 2012

2011

Accelerating Image Analysis For Localization Microscopy With FPGAs

F. Grüll, M. Kirchgessner, R. Kaufmann, M. Hausmann, U. Kebschull.

Heidelberg University and University of Frankfurt

In Proc. International Conference on Field Programmable Logic and Applications, IEEE, 2011

2010

Revisiting Convolution and FFT on Parallel Computation Platforms

H. Fu, R.G. Clapp, O. Lindtjorn

Stanford University

SEG 2010, Denver.